1. Field of the Invention
The present invention relates generally to a tuning apparatus of phase-locked loop type, and is directed more particularly to a tuning apparatus of phase-locked loop type by which the number of signal lines connected between a control circuit and a phase locked loop circuit can be reduced, the number of output terminals of the control circuit can be also reduced and the control program of the control circuit can be simplified so that the memory capacity of a memory housed in the control circuit can be reduced.
2. Description of the Prior Art
As one of the prior art tuning systems employed in a television receiver and a radio receiver, there is a tuning system of PLL (phase-locked loop) type. By this tuning system of PLL type, the oscillating frequency of a local oscillator in a tuning circuit can be quite accurately varied in response to the carrier frequency of a broadcasting wave and the oscillating frequency is very stable so that such a tuning system of PLL type has been employed frequently at present.
FIG. 1 shows a prior art tuning apparatus of PLL type for use with a television receiver. In FIG. 1, a reference letter a designates an antenna, b a tuning circuit, c a VCO (voltage controlled oscillator) working as a local oscillator in the tuning circuit b, d a pre-scaler for frequency-dividing the output signal from the VCO d, e an integrated circuit which is called as a PLLIC (phase locked loop integrated circuit) and hence referred to simply as PLLIC hereinafter and which comprises therein a programmable divider to frequency-divide the output signal from the pre-scaler d, a reference frequency signal generator utilizing a quartz, a phase comparator to compare the phase of the output signal from the reference frequency signal generator with that of the output signal from the programmable divider and so on. Reference letter f denotes a low pass filter through which the output of the phase comparator in the PLLIC e or oscillating frequency controlling voltage is applied to the control terminal of the VCO c, and g a control circuit which controls the tuning circuit and is formed of a so-called one-chip micro-computer. When this control circuit g is supplied with the signals pointing or commanding a channel through an adequate input apparatus such as a so-called ten-key and so on, this control circuit g outputs or delivers various signals to respective parts in response to the supplied signal thereto. Practically, the control circuit g supplies such a signal to the PLLIC e that the dividing ratio of the programmable divider is controlled, such a signal to the tuning circuit b, that is, band switching signal such as in Japan to switch among VHF low band (channel 1 to channel 3), VHF high band (channel 4 to channel 12) and UHF band (channel 13 to channel 62) and a signal to the low pass filter f to appoint its time constant, respectively. In the case of displaying a band, the control circuit g delivers a band display signal. In other cases where other control signals are required, this control circuit g delivers such required control signals.
With this prior art tuning apparatus, when the input apparatus such as the ten-key (not shown) is operated to appoint a certain channel such as the channel 3 of the VHF, the control circuit g supplies the control signal to the PLLIC e and hence the dividing ratio of its programmable divider is switched into such a value to receive the channel 3 and the time constant of the low pass filter f is suitably switched by the switching signal from the control circuit g. Also, the tuning circuit b is switched in band to the VHF by the band switching signal from the control circuit g.
In accompany with the fact that the dividing ratio of the programmable divider is changed over, the VCO c generates the local oscillating signal with the frequency corresponding to, for example, the channel 3. This local oscillating signal is mixed with the high frequency signal applied to the tuning circuit b so that an intermediate frequency signal is obtained from which, for example, the broadcasting wave of the channel 3 can be received or reproduced. At the same time, the display of the band, for example, "low" of VHF is displayed.
FIG. 2 shows an example of the tuning apparatus of the PLL type used in a prior art radio receiver. This tuning apparatus differs from that shown in FIG. 1 in only such a fact that the former has no pre-scaler and hence there is no fundamental difference between the tuning apparatus of FIGS. 1 and 2. Thus, its explanation will be omitted.
In such PLL type tuning apparatus, there are various problems as follows:
At first, the number of the signal lines connecting the tuning circuit b, PLLIC e and so on to the control circuit g is many and the number of necessary output terminals of the control circuit g made of one-chip is also many. Such point will be now explained practically with the tuning apparatus of a television receiver as an example. In general, due to the system construction of the television receiver, the tuning circuit b, PLLIC e, pre-scaler d and low pass filter f are located in the deep or back portion of the television receiver, while since the control circuit g must be located near the input apparatus such as a channel select switch or the like, the control circuit g is disposed at a position near a control panel i.e. near the front side of the television receiver. Accordingly, the distance between the control circuit g and the tuning circuit b, PLLIC e and so on becomes relatively long, and also many signal lines must be connected therebetween. It is, however, undesired that a number of long signal lines are wired within the television receiver in view of its circuit construction, electrical characteristics, the number of assemble working processes and so on. Further, although the treating ability and the number of terminals of the control circuit g made of one-chip micro-computer are limited, the kinds of objects to be controlled thereby are relatively many. To cope therewith, there are employed such means in which one terminal is used for delivery and input of a plurality of kinds of signals by delaying the time therebetween. As a result, the control program becomes naturally quite complicated.
FIG. 3 is a flow chart showing the control program of the prior art tuning apparatus. From this flow chart it will be apparent that this flow chart can never be said as simple. Thus, the area of a memory necessary to memorize the program becomes wide and the time period from the start of the control to its termination becomes long. If, in order to reduce the time period, a micro-computer capable of carrying out high speed process is used to form the control circuit g, its cost is increased very much.